
pthread_once_t:     file format elf64-littleaarch64


Disassembly of section .init:

0000000000400688 <_init>:
  400688:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  40068c:	910003fd 	mov	x29, sp
  400690:	9400004a 	bl	4007b8 <call_weak_fn>
  400694:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400698:	d65f03c0 	ret

Disassembly of section .plt:

00000000004006a0 <.plt>:
  4006a0:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  4006a4:	90000090 	adrp	x16, 410000 <__FRAME_END__+0xf4d4>
  4006a8:	f947fe11 	ldr	x17, [x16, #4088]
  4006ac:	913fe210 	add	x16, x16, #0xff8
  4006b0:	d61f0220 	br	x17
  4006b4:	d503201f 	nop
  4006b8:	d503201f 	nop
  4006bc:	d503201f 	nop

00000000004006c0 <exit@plt>:
  4006c0:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  4006c4:	f9400211 	ldr	x17, [x16]
  4006c8:	91000210 	add	x16, x16, #0x0
  4006cc:	d61f0220 	br	x17

00000000004006d0 <__libc_start_main@plt>:
  4006d0:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  4006d4:	f9400611 	ldr	x17, [x16, #8]
  4006d8:	91002210 	add	x16, x16, #0x8
  4006dc:	d61f0220 	br	x17

00000000004006e0 <pthread_mutex_init@plt>:
  4006e0:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  4006e4:	f9400a11 	ldr	x17, [x16, #16]
  4006e8:	91004210 	add	x16, x16, #0x10
  4006ec:	d61f0220 	br	x17

00000000004006f0 <pthread_create@plt>:
  4006f0:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  4006f4:	f9400e11 	ldr	x17, [x16, #24]
  4006f8:	91006210 	add	x16, x16, #0x18
  4006fc:	d61f0220 	br	x17

0000000000400700 <__gmon_start__@plt>:
  400700:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  400704:	f9401211 	ldr	x17, [x16, #32]
  400708:	91008210 	add	x16, x16, #0x20
  40070c:	d61f0220 	br	x17

0000000000400710 <pthread_join@plt>:
  400710:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  400714:	f9401611 	ldr	x17, [x16, #40]
  400718:	9100a210 	add	x16, x16, #0x28
  40071c:	d61f0220 	br	x17

0000000000400720 <abort@plt>:
  400720:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  400724:	f9401a11 	ldr	x17, [x16, #48]
  400728:	9100c210 	add	x16, x16, #0x30
  40072c:	d61f0220 	br	x17

0000000000400730 <puts@plt>:
  400730:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  400734:	f9401e11 	ldr	x17, [x16, #56]
  400738:	9100e210 	add	x16, x16, #0x38
  40073c:	d61f0220 	br	x17

0000000000400740 <pthread_once@plt>:
  400740:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  400744:	f9402211 	ldr	x17, [x16, #64]
  400748:	91010210 	add	x16, x16, #0x40
  40074c:	d61f0220 	br	x17

0000000000400750 <pthread_mutex_lock@plt>:
  400750:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  400754:	f9402611 	ldr	x17, [x16, #72]
  400758:	91012210 	add	x16, x16, #0x48
  40075c:	d61f0220 	br	x17

0000000000400760 <pthread_mutex_unlock@plt>:
  400760:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  400764:	f9402a11 	ldr	x17, [x16, #80]
  400768:	91014210 	add	x16, x16, #0x50
  40076c:	d61f0220 	br	x17

Disassembly of section .text:

0000000000400770 <_start>:
  400770:	d280001d 	mov	x29, #0x0                   	// #0
  400774:	d280001e 	mov	x30, #0x0                   	// #0
  400778:	aa0003e5 	mov	x5, x0
  40077c:	f94003e1 	ldr	x1, [sp]
  400780:	910023e2 	add	x2, sp, #0x8
  400784:	910003e6 	mov	x6, sp
  400788:	580000c0 	ldr	x0, 4007a0 <_start+0x30>
  40078c:	580000e3 	ldr	x3, 4007a8 <_start+0x38>
  400790:	58000104 	ldr	x4, 4007b0 <_start+0x40>
  400794:	97ffffcf 	bl	4006d0 <__libc_start_main@plt>
  400798:	97ffffe2 	bl	400720 <abort@plt>
  40079c:	00000000 	.inst	0x00000000 ; undefined
  4007a0:	00400940 	.word	0x00400940
  4007a4:	00000000 	.word	0x00000000
  4007a8:	00400a38 	.word	0x00400a38
  4007ac:	00000000 	.word	0x00000000
  4007b0:	00400ab8 	.word	0x00400ab8
  4007b4:	00000000 	.word	0x00000000

00000000004007b8 <call_weak_fn>:
  4007b8:	90000080 	adrp	x0, 410000 <__FRAME_END__+0xf4d4>
  4007bc:	f947f000 	ldr	x0, [x0, #4064]
  4007c0:	b4000040 	cbz	x0, 4007c8 <call_weak_fn+0x10>
  4007c4:	17ffffcf 	b	400700 <__gmon_start__@plt>
  4007c8:	d65f03c0 	ret
  4007cc:	00000000 	.inst	0x00000000 ; undefined

00000000004007d0 <deregister_tm_clones>:
  4007d0:	b0000080 	adrp	x0, 411000 <exit@GLIBC_2.17>
  4007d4:	9101a000 	add	x0, x0, #0x68
  4007d8:	b0000081 	adrp	x1, 411000 <exit@GLIBC_2.17>
  4007dc:	9101a021 	add	x1, x1, #0x68
  4007e0:	eb00003f 	cmp	x1, x0
  4007e4:	540000a0 	b.eq	4007f8 <deregister_tm_clones+0x28>  // b.none
  4007e8:	90000001 	adrp	x1, 400000 <_init-0x688>
  4007ec:	f9456c21 	ldr	x1, [x1, #2776]
  4007f0:	b4000041 	cbz	x1, 4007f8 <deregister_tm_clones+0x28>
  4007f4:	d61f0020 	br	x1
  4007f8:	d65f03c0 	ret
  4007fc:	d503201f 	nop

0000000000400800 <register_tm_clones>:
  400800:	b0000080 	adrp	x0, 411000 <exit@GLIBC_2.17>
  400804:	9101a000 	add	x0, x0, #0x68
  400808:	b0000081 	adrp	x1, 411000 <exit@GLIBC_2.17>
  40080c:	9101a021 	add	x1, x1, #0x68
  400810:	cb000021 	sub	x1, x1, x0
  400814:	9343fc21 	asr	x1, x1, #3
  400818:	8b41fc21 	add	x1, x1, x1, lsr #63
  40081c:	9341fc21 	asr	x1, x1, #1
  400820:	b40000a1 	cbz	x1, 400834 <register_tm_clones+0x34>
  400824:	90000002 	adrp	x2, 400000 <_init-0x688>
  400828:	f9457042 	ldr	x2, [x2, #2784]
  40082c:	b4000042 	cbz	x2, 400834 <register_tm_clones+0x34>
  400830:	d61f0040 	br	x2
  400834:	d65f03c0 	ret

0000000000400838 <__do_global_dtors_aux>:
  400838:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  40083c:	910003fd 	mov	x29, sp
  400840:	f9000bf3 	str	x19, [sp, #16]
  400844:	b0000093 	adrp	x19, 411000 <exit@GLIBC_2.17>
  400848:	3941a260 	ldrb	w0, [x19, #104]
  40084c:	35000080 	cbnz	w0, 40085c <__do_global_dtors_aux+0x24>
  400850:	97ffffe0 	bl	4007d0 <deregister_tm_clones>
  400854:	52800020 	mov	w0, #0x1                   	// #1
  400858:	3901a260 	strb	w0, [x19, #104]
  40085c:	f9400bf3 	ldr	x19, [sp, #16]
  400860:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400864:	d65f03c0 	ret

0000000000400868 <frame_dummy>:
  400868:	17ffffe6 	b	400800 <register_tm_clones>

000000000040086c <once_init_routine>:
  40086c:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400870:	910003fd 	mov	x29, sp
  400874:	b0000080 	adrp	x0, 411000 <exit@GLIBC_2.17>
  400878:	9101c000 	add	x0, x0, #0x70
  40087c:	d2800001 	mov	x1, #0x0                   	// #0
  400880:	97ffff98 	bl	4006e0 <pthread_mutex_init@plt>
  400884:	b9001fa0 	str	w0, [x29, #28]
  400888:	b9401fa0 	ldr	w0, [x29, #28]
  40088c:	7100001f 	cmp	w0, #0x0
  400890:	54000060 	b.eq	40089c <once_init_routine+0x30>  // b.none
  400894:	12800000 	mov	w0, #0xffffffff            	// #-1
  400898:	97ffff8a 	bl	4006c0 <exit@plt>
  40089c:	d503201f 	nop
  4008a0:	a8c27bfd 	ldp	x29, x30, [sp], #32
  4008a4:	d65f03c0 	ret

00000000004008a8 <thread_routine>:
  4008a8:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  4008ac:	910003fd 	mov	x29, sp
  4008b0:	f9000fa0 	str	x0, [x29, #24]
  4008b4:	90000000 	adrp	x0, 400000 <_init-0x688>
  4008b8:	9121b001 	add	x1, x0, #0x86c
  4008bc:	b0000080 	adrp	x0, 411000 <exit@GLIBC_2.17>
  4008c0:	9101b000 	add	x0, x0, #0x6c
  4008c4:	97ffff9f 	bl	400740 <pthread_once@plt>
  4008c8:	b9002fa0 	str	w0, [x29, #44]
  4008cc:	b9402fa0 	ldr	w0, [x29, #44]
  4008d0:	7100001f 	cmp	w0, #0x0
  4008d4:	54000060 	b.eq	4008e0 <thread_routine+0x38>  // b.none
  4008d8:	12800000 	mov	w0, #0xffffffff            	// #-1
  4008dc:	97ffff79 	bl	4006c0 <exit@plt>
  4008e0:	b0000080 	adrp	x0, 411000 <exit@GLIBC_2.17>
  4008e4:	9101c000 	add	x0, x0, #0x70
  4008e8:	97ffff9a 	bl	400750 <pthread_mutex_lock@plt>
  4008ec:	b9002fa0 	str	w0, [x29, #44]
  4008f0:	b9402fa0 	ldr	w0, [x29, #44]
  4008f4:	7100001f 	cmp	w0, #0x0
  4008f8:	54000060 	b.eq	400904 <thread_routine+0x5c>  // b.none
  4008fc:	12800000 	mov	w0, #0xffffffff            	// #-1
  400900:	97ffff70 	bl	4006c0 <exit@plt>
  400904:	90000000 	adrp	x0, 400000 <_init-0x688>
  400908:	912ba000 	add	x0, x0, #0xae8
  40090c:	97ffff89 	bl	400730 <puts@plt>
  400910:	b0000080 	adrp	x0, 411000 <exit@GLIBC_2.17>
  400914:	9101c000 	add	x0, x0, #0x70
  400918:	97ffff92 	bl	400760 <pthread_mutex_unlock@plt>
  40091c:	b9002fa0 	str	w0, [x29, #44]
  400920:	b9402fa0 	ldr	w0, [x29, #44]
  400924:	7100001f 	cmp	w0, #0x0
  400928:	54000060 	b.eq	400934 <thread_routine+0x8c>  // b.none
  40092c:	12800000 	mov	w0, #0xffffffff            	// #-1
  400930:	97ffff64 	bl	4006c0 <exit@plt>
  400934:	d2800000 	mov	x0, #0x0                   	// #0
  400938:	a8c37bfd 	ldp	x29, x30, [sp], #48
  40093c:	d65f03c0 	ret

0000000000400940 <main>:
  400940:	a9b97bfd 	stp	x29, x30, [sp, #-112]!
  400944:	910003fd 	mov	x29, sp
  400948:	b9001fa0 	str	w0, [x29, #28]
  40094c:	f9000ba1 	str	x1, [x29, #16]
  400950:	90000000 	adrp	x0, 400000 <_init-0x688>
  400954:	9122a001 	add	x1, x0, #0x8a8
  400958:	910183a0 	add	x0, x29, #0x60
  40095c:	d2800003 	mov	x3, #0x0                   	// #0
  400960:	aa0103e2 	mov	x2, x1
  400964:	d2800001 	mov	x1, #0x0                   	// #0
  400968:	97ffff62 	bl	4006f0 <pthread_create@plt>
  40096c:	b9006fa0 	str	w0, [x29, #108]
  400970:	b9406fa0 	ldr	w0, [x29, #108]
  400974:	7100001f 	cmp	w0, #0x0
  400978:	54000060 	b.eq	400984 <main+0x44>  // b.none
  40097c:	12800000 	mov	w0, #0xffffffff            	// #-1
  400980:	97ffff50 	bl	4006c0 <exit@plt>
  400984:	90000000 	adrp	x0, 400000 <_init-0x688>
  400988:	9121b001 	add	x1, x0, #0x86c
  40098c:	b0000080 	adrp	x0, 411000 <exit@GLIBC_2.17>
  400990:	9101b000 	add	x0, x0, #0x6c
  400994:	97ffff6b 	bl	400740 <pthread_once@plt>
  400998:	b9006fa0 	str	w0, [x29, #108]
  40099c:	b9406fa0 	ldr	w0, [x29, #108]
  4009a0:	7100001f 	cmp	w0, #0x0
  4009a4:	54000060 	b.eq	4009b0 <main+0x70>  // b.none
  4009a8:	12800000 	mov	w0, #0xffffffff            	// #-1
  4009ac:	97ffff45 	bl	4006c0 <exit@plt>
  4009b0:	b0000080 	adrp	x0, 411000 <exit@GLIBC_2.17>
  4009b4:	9101c000 	add	x0, x0, #0x70
  4009b8:	97ffff66 	bl	400750 <pthread_mutex_lock@plt>
  4009bc:	b9006fa0 	str	w0, [x29, #108]
  4009c0:	b9406fa0 	ldr	w0, [x29, #108]
  4009c4:	7100001f 	cmp	w0, #0x0
  4009c8:	54000060 	b.eq	4009d4 <main+0x94>  // b.none
  4009cc:	12800000 	mov	w0, #0xffffffff            	// #-1
  4009d0:	97ffff3c 	bl	4006c0 <exit@plt>
  4009d4:	90000000 	adrp	x0, 400000 <_init-0x688>
  4009d8:	912c4000 	add	x0, x0, #0xb10
  4009dc:	97ffff55 	bl	400730 <puts@plt>
  4009e0:	b0000080 	adrp	x0, 411000 <exit@GLIBC_2.17>
  4009e4:	9101c000 	add	x0, x0, #0x70
  4009e8:	97ffff5e 	bl	400760 <pthread_mutex_unlock@plt>
  4009ec:	b9006fa0 	str	w0, [x29, #108]
  4009f0:	b9406fa0 	ldr	w0, [x29, #108]
  4009f4:	7100001f 	cmp	w0, #0x0
  4009f8:	54000060 	b.eq	400a04 <main+0xc4>  // b.none
  4009fc:	12800000 	mov	w0, #0xffffffff            	// #-1
  400a00:	97ffff30 	bl	4006c0 <exit@plt>
  400a04:	f94033a0 	ldr	x0, [x29, #96]
  400a08:	d2800001 	mov	x1, #0x0                   	// #0
  400a0c:	97ffff41 	bl	400710 <pthread_join@plt>
  400a10:	b9006fa0 	str	w0, [x29, #108]
  400a14:	b9406fa0 	ldr	w0, [x29, #108]
  400a18:	7100001f 	cmp	w0, #0x0
  400a1c:	54000060 	b.eq	400a28 <main+0xe8>  // b.none
  400a20:	12800000 	mov	w0, #0xffffffff            	// #-1
  400a24:	97ffff27 	bl	4006c0 <exit@plt>
  400a28:	52800000 	mov	w0, #0x0                   	// #0
  400a2c:	a8c77bfd 	ldp	x29, x30, [sp], #112
  400a30:	d65f03c0 	ret
  400a34:	00000000 	.inst	0x00000000 ; undefined

0000000000400a38 <__libc_csu_init>:
  400a38:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  400a3c:	910003fd 	mov	x29, sp
  400a40:	a901d7f4 	stp	x20, x21, [sp, #24]
  400a44:	90000094 	adrp	x20, 410000 <__FRAME_END__+0xf4d4>
  400a48:	90000095 	adrp	x21, 410000 <__FRAME_END__+0xf4d4>
  400a4c:	91374294 	add	x20, x20, #0xdd0
  400a50:	913722b5 	add	x21, x21, #0xdc8
  400a54:	a902dff6 	stp	x22, x23, [sp, #40]
  400a58:	cb150294 	sub	x20, x20, x21
  400a5c:	f9001ff8 	str	x24, [sp, #56]
  400a60:	2a0003f6 	mov	w22, w0
  400a64:	aa0103f7 	mov	x23, x1
  400a68:	9343fe94 	asr	x20, x20, #3
  400a6c:	aa0203f8 	mov	x24, x2
  400a70:	97ffff06 	bl	400688 <_init>
  400a74:	b4000194 	cbz	x20, 400aa4 <__libc_csu_init+0x6c>
  400a78:	f9000bb3 	str	x19, [x29, #16]
  400a7c:	d2800013 	mov	x19, #0x0                   	// #0
  400a80:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  400a84:	aa1803e2 	mov	x2, x24
  400a88:	aa1703e1 	mov	x1, x23
  400a8c:	2a1603e0 	mov	w0, w22
  400a90:	91000673 	add	x19, x19, #0x1
  400a94:	d63f0060 	blr	x3
  400a98:	eb13029f 	cmp	x20, x19
  400a9c:	54ffff21 	b.ne	400a80 <__libc_csu_init+0x48>  // b.any
  400aa0:	f9400bb3 	ldr	x19, [x29, #16]
  400aa4:	a941d7f4 	ldp	x20, x21, [sp, #24]
  400aa8:	a942dff6 	ldp	x22, x23, [sp, #40]
  400aac:	f9401ff8 	ldr	x24, [sp, #56]
  400ab0:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400ab4:	d65f03c0 	ret

0000000000400ab8 <__libc_csu_fini>:
  400ab8:	d65f03c0 	ret

Disassembly of section .fini:

0000000000400abc <_fini>:
  400abc:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400ac0:	910003fd 	mov	x29, sp
  400ac4:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400ac8:	d65f03c0 	ret
